As AI systems scale from training large language models to powering emerging cognitive workloads, the industry is confronting a new kind of bottleneck, not in compute, but in how data moves. In this roundtable discussion hosted by Karl Freund of Cambrian-AI Research and Jim McGregor of Tirias Research, Baya Systems Chief Commercial Officer Nandan Nayampally discusses how the exponential growth of AI models, datasets, and system complexity is reshaping the semiconductor landscape.

The conversation explores how the last decade of innovation, from CPU-centric to GPU-accelerated compute, has now given way to a data-movement-driven paradigm, where latency, bandwidth, and power efficiency define success more than raw performance. Nandan highlights how Baya’s software-driven, chiplet-ready interconnect IP portfolio is engineered to address this challenge by enabling efficient, scalable data transport across heterogeneous compute elements.

Nandan highlights how Baya’s software-driven, chiplet-ready interconnect IP portfolio is engineered to address this challenge by enabling efficient, scalable data transport across heterogeneous compute elements.

Drawing parallels between the densification of smartphone SoCs and the emerging modular architectures of AI systems, Nandan explains how chiplets are redefining compute density, scalability, and time-to-market.

Together, the panel delves into industry trends such as the rise of NVLink, UALink, and Ultra Ethernet, and the broader shift toward ecosystem collaboration for chiplet interoperability. As Nandan notes, the future of AI infrastructure will depend on right-sized, tightly coupled systems that blend compute, memory, and interconnect into one cohesive fabric, a goal Baya Systems is already helping its customers realize today.