Transformer-specialized ASIC; new NoC IP solutions; formal verification for C++ designs

via EDA Cafe “Baya’s NoC IP – Startup Baya Systems has emerged from stealth mode to announce its IP portfolio designed to obtain energy-efficient data movement in complex SoCs and in chiplet-based designs. According to the company, new solutions are needed to overcome the widening gap between memory performance and the processing needs of AI, and to take out the guesswork from the design of the intelligent fabric that connects blocks in an SoC or chiplets in a multi-die design. Baya Systems’ solution includes the WeaverPro software platform that supports the SoC designer from initial specification all the way to post-silicon tuning; and the WeaveIP, that provides components to build a unified fabric. According to the company, WeaveIP has an extremely efficient, scalable transport architecture that maximizes performance and throughput, while minimizing latency, silicon footprint and power. WeaveIP also supports standard protocols.

Baya Systems has also recently announced a partnership with Blue Cheetah to offer a combined chiplet-optimized Network on Chip (NoC) and Physical Layer (PHY) interconnect IP solution.”  Read the full article HERE