Join Baya Systems at the Chiplet Pavilion at DAC
The EE Times Chiplets in-person conference & exhibition on June 23-25 at in San Francisco will discuss the progress of chiplet technologies and the chiplet supply chain in all their complexity. The agenda will examine the entire value chain and ecosystem, spanning from initial concept and design exploration to packaging and testing. It will also explore the emergence of initiatives aiming to establish relevant technical standards and a chiplet marketplace.
Don’t miss Baya Systems’ CCO, Nandan Nayampally, as he joins the panel discussion “Developing the Chiplet Economy” on June 24th, from 2:00–2:55 p.m. Explore the readiness of advanced packaging technologies, the role of design tool vendors, silicon makers, and IP providers, and the collaborative efforts required to establish a thriving chiplet economy.
Baya Systems’ founder and CEO, Dr. Sailesh Kumar, is presenting “Unleashing Scale Through Chiplets – From Concept to Deployment” immediately after on June 24th, from 3:00pm to 3:20pm.
We welcome you to stop by the Baya Systems’ Booth #2430 to talk about your applications and learn more about our company and products.
Baya Systems Panel Participation
Time: 2:00 PM – 2:55 PM PDT
(CL24-E) Panel Discussion: Developing the Chiplet Economy
This Panel Discussion with industry experts is moderated by Nitin Dahad, Editor-in-Chief, EE Times.
The commercial chiplet ecosystem is rapidly evolving, driven by the need for greater scalability, performance, and cost efficiency. However, its growth is challenged by the lack of standardized interfaces, industry-wide collaboration, and the complexity of integrating chiplets from multiple vendors. Ensuring interoperability across different foundries, pre-validating components, and defining clear roles for system integration remain key challenges. Additionally, robust traceability and security mechanisms are critical for managing the multi-die supply chain. This session will explore the readiness of advanced packaging technologies, the role of design tool vendors, silicon makers, and IP providers, and the collaborative efforts required to establish a thriving chiplet economy.
Panelists:
- Abhijeet Chakraborty, VP Engineering, Synopsys
- David Glasco, VP Compute Solutions Group, Cadence
- Nandan Nayampally, Chief Commercial Officer, Baya Systems
- Eddie Ramirez, VP of Marketing and Ecosystem Development, Infrastructure Line of Business, Arm
Baya Systems Presentation
Time: 3:00 PM – 3:20 PM PDT
(CL24-F) Unleashing Scale Through Chiplets – From Concept to Deployment
Presented by Dr. Sailesh Kumar, Founder and CEO, Baya Systems
From closely coupled processors and accelerators optimized into SoCs and chiplets for edge systems, to data centers pushing scale-up and scale-out barriers with advanced switching, skyrocketing performance demands, especially for AI, the next-generation needs overall system level design mind-set, chiplet-ready thinking and tooling and hyper-efficient, scalable data movement on die and across die. This presentation walks through the state-of art platform and IP solutions to truly unleash the power of chiplets to meet these demands.
